Workloads on general-purpose computing systems have changed dramatically over the past few years, with greater emphasis on applications such as databases, media processing, networking, and communications. Several of these workloads require orders-of-magnitude higher computing performance than what is available in current systems. However, until recently, most high performance computing studies have primarily focused on scientific and engineering workloads, potentially leading to design decisions not suitable for emerging workloads. Ranganathan's work has been the first to use detailed simulation to study several emerging workloads on state-of-the-art general-purpose systems. In this talk, Ranganathan will discuss some of his recent work on understanding and improving the performance of media processing workloads on general-purpose architectures.

An analysis of the effectiveness of state-of-the-art features (techniques to extract instruction-level parallelism, media instruction-set extensions, software prefetching, and large caches) identifies two key trends: (1) media workloads on current general-purpose systems are primarily compute-bound and (2) current trends towards devoting a large fraction of on-chip transistors (up to 80%) for caches can often be ineffective for media workloads. In response to these results, Ranganathan will discuss a new cache organization, called a reconfigurable cache, that allows the on-chip cache transistors to be dynamically divided into partitions that can be used for other processor activities (e.g., instruction memoization, application-controlled memory, and prefetching buffers). Our design of the reconfigurable cache requires very few modifications to existing caches and has small impact on cache access times. He will discuss how, for media applications, reconfigurable caches can be effectively used for instruction memoization to reuse memory for computation.