For over three decades, computers have made a continuous, exponential improvement in performance, as predicted by Moore's Law. Feature size in each new generation of circuits is smaller than the last; yielding an ever-increasing number of components on a single die and continually rising clock frequencies. In recent years, the architectures exploiting these resources have begun to change, requiring more sophistication in the compilers and tools that map applications onto hardware. In particular, designs increasingly rely on software to expose parallelism and keep processor utilization high. During this talk, I will discuss the state of parallel software tools, industry efforts to aid the creation of parallel software, and opportunities for future research and development in this area.