I'm a Computer Science PhD graduate student at Rice University. I joined the program in 2004 after completing a BS in Computer Science at Michigan Tech University. My advisor is Dr. Keith Cooper. I completed my MS thesis in May 2007: Tuning an Adaptive Compilation Search Space with Loop Unrolling, and I plan to finish my PhD thesis during the 2010-2011 academic year.

My research interests mainly focus on compilers and program optimization, but the adaptive compilation work for my MS thesis exposed me to concepts from artificial intelligence. For my PhD, I am exploring techniques that allow compilers be more adaptable in response to rapid changes in hardware and increasing complexity in software. I developed an LLVM-based framework that enables selective runtime optimization for statically compiled languages (C/C++). My approach, called IR annotation, generates a fully optimized native binary tagged with a higher-level intermediate representation of itself. The native binary achieves the speed of native execution immediately upon invocation, while the IR annotation allows aggressive runtime optimization that can selectively target performance bottlenecks. More recently, I became involved with the Platform Aware Compilation Environment (PACE) project at Rice. I'm finishing work on automatic resource characterization in which we developed micro-benchmarks for detecting cache characteristics of unknown underlying systems. This problem is actually quite difficult to solve in a general and fully-automatic manner. Our novel contributions include robust analysis techniques that produce reasonable results even in the face of noisy or unexpected data.

I spent three months in the summer of 2007 working as an intern at Qualcomm. I worked on the compiler for Qualcomm's next-generation DSP processor.

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Spring 2010:

Fall 2006:

Spring 2006:

Fall 2005:

Spring 2005:

Fall 2004: