Rice University
COMP 522
Multi-core Computing
Fall 2008
Schedule


August 25: Introduction

August 27: Simultaneous Multithreading and the Case for Chip Multiprocessing

September 2: Exploring the Multicore Design Space

September 4: Piranha and Hydra: A Tale of Two Chip Multiprocessors

September 9: Sun Niagara and IBM POWER6

September 11: Intel's Tiled Multicore

September 16: No Class

September 18: Shared Cache

September 23: Cilk

September 29: NESL

September 30: Ct

October 2: Novel Multicore Architectures

October 7: Shared Memory Consistency Models

October 9: C++ Concurrency Memory Model

October 13: Java Memory Model

October 17: Implementing Nested Data Parallelism

October 21: Data Race Detection

October 30: Data Race Detection Revisited

November 4: Scheduling

November 6: Scheduling and Shared Cache

November 11: Debugging

November 13: Synchronization Primitives: Locks and Barriers

November 21: Wait-free Synchronization

November 24: Practical Non-blocking Concurrent Objects

November 25: Transactional Memory Overview

December 2: Hardware Support for Transactional Memory

December 4: Software Transactional Memory