SMARTE:
A Simulation Environment for Real-Time
Shared-Memory Architecture
Abstract
Computer simulation is the discipline of designing a model of an actual
or theoritical physical system, executing the model on a computer and analyzing
the output to study it's behavior. To understand complicated systems in
which the effect of varying different parameters is modelled, simulation
is one of the most effective ways of studying it.
A tool was found necessary, where the architects, designers and system
scientists could test their algorithms for better design of the system.
Computer Architects increasingly rely on such
simulations to understand the complex interaction of various factors in
an effort to tune the system.
In
real-time systems, no simulator existed which could handle the issues affecting
the real-time processes. A real-time process can be loaded anywhere
in primary memory, the start time can be specified for it, along with it's
periodicity and priority among other critical proceses. Each process might
get pre-empted when a higher priotity process comes along, and will resume
computation when that higher priority process has finished.
Uni-processor
applications can be easily ported to distributed shared memory (DSM) systems
and their performance can be incrementally tuned to exploit the available
resources. Due to increasing gap between processor speed and memory speed,
DSM systems use one or more levels or caches that are kept consistent by
a directory based cache coherence protocol. In the DSM systems, each process
might be physically distributed over the entire shared memory address space.
Each processing node might read in the data from anywhere in the shared
memory and process that data. The access patterns would be different for
different applications. The access times over the entire address space
would also vary depending on whether the accessed memory is local or remote.
Additionally, each process might start executing on one processor, and
depending on the process charactereistics and processor load would migrate
to another processor. Then the second processor gets hold of the Process
Control Block of the specific process, and start executing the same depending
on it's priority and the current load of the processor.
-
Bachelor of Technology Thesis
-
A
Presentation seminar
-
A
paper on this project
-
SMART<
- the code