SMARTE A Simulation Environment for Real-Time Shared-Memory Architecture
Objectives
Background
Models
Overview of simulator
Distributed Architecture
Levels of Hierarchy in memory
Object Model of Simulator
Memory
Enhancements to ISA
Processor
Simulation Steps
PPT Slide
Task Specification
Pre-emption & Migration of the spec
Future Work...
Email: santa@ieee.org
Home Page: http://ppc.becs.ac.in/~santa