I'm currently pursuing a Ph.D. in the Computer Science Department at Rice University. I enrolled in the doctoral program in Fall 1998, and work with Dr. Peter Druschel. I expect to graduate in (or before) 2003.

Research area: Server operating systems, physical memory management, disk scheduling.

1. M.S. from Rice University  (January 2001)

   MS Thesis, and corresponding publication in the Symposium on Operating Systems Principles (SOSP 2001):
   		Anticipatory scheduling: A disk scheduling framework to overcome deceptive idleness in synchronous I/O
   Authors:		Sitaram Iyer, Peter Druschel
   Abstract:		Disk schedulers in current operating systems are generally work-conserving, i.e., they schedule a request as soon as the previous request has finished. Such schedulers often require multiple outstanding requests from each process to meet system-level goals of performance and quality of service. Unfortunately, many common applications issue disk read requests in a synchronous manner, interspersing successive requests with short periods of computation. The scheduler chooses the next request too early; this induces deceptive idleness, a condition where the scheduler incorrectly assumes that the last request issuing process has no further requests, and becomes forced to switch to a request from another process. We propose the anticipatory disk scheduling framework to solve this problem in a simple, general and transparent way, based on the non-work-conserving scheduling discipline. Our FreeBSD implementation is observed to yield large benefits on a range of microbenchmarks and real workloads. The Apache webserver delivers between 29% and 71% more throughput on a disk-intensive workload. The Andrew filesystem benchmark runs faster by 8%, due to a speedup of 54% in its read-intensive phase. Variants of the TPC-B database benchmark exhibit improvements between 2% and 60%. Proportional-share schedulers are seen to achieve their contracts accurately and efficiently.

2. Webserver QoS

   Paper:		A resource management framework for predictable QoS for webservers   (submitted for publication)
   Authors:		Mohit Aron, Sitaram Iyer, Peter Druschel
   Abstract:		We present a framework wherein webserver operators can ensure a minimal quality of service guarantee for multiple websites hosted on one server. A measurement-based admission control mechanism decides the feasibility of hosting the sites, whereupon a feedback-based resource scheduling framework maintains the desired QoS levels. I worked on the disk and memory aspects of this problem.

3. B.Tech. from CSE, IIT Bombay  (March 1998)

   BTech Thesis, and corresponding publication in the Intl. conference on Knowledge Bases in Computer Systems (KBCS) '98:
   		Xority: a measure of separability of training sets for hidden layer size estimation in neural networks.
   Authors:		Sitaram Iyer, Pushpak Bhattacharyya
   Abstract:		We devise a new approach to estimate the practical size of a neural network. Our proposed metric captures inherent regularities in training sets, thus drastically lowering the expected neural network size.

Summer intern at the Bhabha Atomic Research Center, Bombay (1997):

I worked on, and finished a project on parallelized implementation of neural networks for handwritten character recognition.

I have been a teaching assistant for a total of six semesters: five at Rice University, and one at IIT Bombay. These courses were diverse, but four of them were in the Systems area. My duties have included teaching, conducting laboratory sessions, assisting students with projects, and grading examinations.

I have referreed submissions to conferences such as SOSP, OSDI, USENIX, Sigmetrics, Infocom and ISCA.

1. The ability to think of many interesting and relevant research ideas
2. A fair knowledge of various topics in and related to operating systems
3. Keen and rapid programming ability in a wide variety of paradigms, programming languages and platforms
4. A deep desire to work on creative projects, and complete them

1. Dr. Peter Druschel, druschel@cs.rice.edu
   Associate Professor, Computer Science, Rice University

2. Dr. Willy Zwaenepoel, willy@cs.rice.edu
   Professor, CS and ECE, Rice University

3. Dr. Dan Wallach, dwallach@cs.rice.edu
   Assistant Professor, Computer Science, Rice University