Patents

Thomas W. Barr, Scott Rixner, Kathleen J. Foster
March 2015 US Provisional Patent

Owl: A Python-based toolchain and runtime system for small embedded systems

Thomas W. Barr, Scott Rixner
March 2015 US Patent #8,984,184

System and Method for Managing Input/Output Data of Peripheral Devices

USPTO
June 2014 US Patent #8,761,152

Method and System for Scalable Ethernet

USPTO
Scott Rixner, Kartik Mohanram, Mihir R. Choudhury
July 2011 US Patent #7,979,666

System and Method for Context-independent Codes for Off-chip Interconnects

USPTO
Scott Rixner, John Owens, Ujval J. Kapasi, William J. Dally
October 2010 US Patent #7,818,539

System and Method for Performing Efficient ConditionalVector Operations For Data Parallel Architectures InvolvingBoth Input and Conditional Vector Values

USPTO
William J. Dally, Scott Rixner
April 2010 US Patent #7,707,384

System and Method for Re-ordering Memory References forAccess to Memory

USPTO
William J. Dally, Scott Rixner
May 2007 US Patent #7,216,214

System and Method for Re-ordering Memory References forAccess to Memory

USPTO
William J. Dally, Scott Rixner, John Owens, Ujval J. Kapasi
May 2006 US Patent #7,100,026

System and Method for Performing Efficient ConditionalVector Operations For Data Parallel Architectures InvolvingBoth Input and Conditional Vector Values

USPTO
William J. Dally, Scott Rixner
May 2006 US Patent #7,047,391

System and Method for Re-ordering Memory References forAccess to Memory

USPTO
William J. Dally, Scott Rixner, John Owens, Ujval J. Kapasi
July 2001 US Patent #6,269,435

System and Method for Implementing Conditional VectorOperations in Which an Input Vector Containing MultipleOperands to Be Used in Conditional Operations Is DividedInto Two Or More Output Vectors Based on a ConditionVector

USPTO
William J. Dally, Scott Rixner, J. P. Grossman, Christopher Buehler
February 2001 US Patent #6,192,384

System and Method for Performing Compound Vector Operations

USPTO
Scott Rixner, Clarence R. Ogilvie
January 2000 US Patent #6,016,531

Apparatus for performing real time caching utilizing an execution quantization timer and an interrupt controller

USPTO