Rice University
COMP 522
Multicore Computing
Fall 2016
John Mellor-Crummey, johnmc@rice.edu, DH3082, x5179
TTh, 1:00pm-2:15pm
Duncan Hall 1075


Course Description

Over the last 15 years, processor architects have shifted their strategy for improving microprocessor performance from pursuing regular increases in clock frequency and single thread performance to delivering multiple cores per chip. This change has had a dramatic impact on software. Previously, application programmers painlessly rode the wave of increases in clock frequencies and architectural enhancements to higher performance. With multicore processors, improvements in performance require application developers to use increasing levels of thread-level parallelism. As a result, parallel programming has suddenly become relevant for all computer systems.

The goal of the course is to study multicore processor architectures, the implications of hardware designs, software challenges, and emerging technologies relevant to hardware and software for multicore systems. Topics will include multicore microprocessors, memory hierarchy (cache organization alternatives), multithreaded programming models, scheduling (including work stealing), memory models (which specify program behavior), synchronization (including wait-free synchronization), transactional memory (hardware and software), concurrent data structures, debugging (including race detection), and performance analysis.

This course will focus on reading, analyzing, and discussing research papers (many of them award winning) related to hardware and software issues for multicore systems.


Course Material


Prerequisites

COMP 320 and COMP 425, or equivalent. General knowledge of computer systems and computer architecture will be assumed.


Modification History
23 August 2016   Initial version