| COMP 522 |
| Multi-core Computing |
| Fall 2008 |
| John Mellor-Crummey, johnmc@cs.rice.edu, DH3082, x5179 |
| TTh, 1:00pm-2:20pm |
| Location: Martel 103 |
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Over the last few years, chip vendors have shifted their strategy for improving microprocessor performance to delivering multiple processor cores per chip instead of continuing to pursue dramatic increases in clock frequency. This change represents something of a cataclysmic shift for software. In the past, application programmers painlessly rode the wave of higher clock frequencies to faster performance. With the advent of multi-core processors, improvements in application performance will depend upon making effective use of increasing levels of coarse-grain parallelism. As a result, parallel programming has suddenly become relevant for all computer systems.
The goal of the course is to study multi-core processor architectures, the implications of hardware designs, software challenges, and emerging technologies relevant to hardware and software for multi-core systems. Topics will include multi-core microprocessors, memory hierarchy (cache organization alternatives), multithreaded programming models, scheduling (including work stealing), memory models (which specify program behavior), synchronization (including wait-free synchronization, and transactional memory), concurrent data structures, debugging (including race detection), and performance analysis.
This course will focus on reading, analyzing, and discussing research papers (many of them award winning) related to hardware and software issues for multi-core systems.
| 25 August 2008 | Updated |