|Office:||Duncan Hall 3032|
Dept. of Computer Science, MS 132
6100 Main St.
Houston, TX 77005
|Office Hours:||Spring 2015: Tuesday 11am-noon, DCH 3032
Advising meetings by appointment
- Computer Science Undergraduate Lunch Talk Series
- ENGI 128 - Introduction to Engineering Systems (Fall 2010)
- COMP 140 - Computational Thinking (Fall 2014)
- COMP 160 - Introduction to Computer Gaming (Fall 2012)
- COMP 182 - Algorithmic Thinking (Spring 2013)
- COMP 215 - Introduction to Program Design (Fall 2011)
- COMP 221 - Introduction to Computer Systems (Spring 2014)
- COMP 310 - Advanced Object-Oriented Programming (Fall 2010)
- COMP/ELEC 519 - Network Systems Architecture (Spring 2008)
- COMP/ELEC 525 - Advanced Microprocessor Architecture (Spring 2007)
- ELEC 693 - Advanced Topics - Computer Systems (Fall 2009)
- ELEC 696 - Computer Architecture Seminar (Spring 2011)
- An Introduction to Interactive Programming in Python (Coursera)
- Principles of Computing (Coursera)
- Algorithmic Thinking (Coursera)
I have developed CodeSkulptor, a browser-based Python environment for devloping interactive applications. We are using this environment in our Coursera course and at Rice and hope to deploy it more widely for education.
- Chair, Computer Science Undergraduate Committee
- Chair, School of Engineering Curriculum Committee
- Member, School of Engineering Design Committee
- Member, University Committee on Undergraduate Curriculum
Scott Rixner is a Professor in the Computer Science & Electrical and Computer Engineering departments at Rice University. He leads the Rice Computer Architecture Group, and his research interests include media, network, and communications processing; the interaction between operating systems and computer architectures; and memory system architecture. During his doctoral studies, Rixner was the principal architect of the Imagine Stream Processor. His current research focuses on embedded systems, network server architecture, network virtualization, and memory system architecture.
Some of his recent publications include:
- Predictive Parallelization: Taming Tail Latencies in Web Search (SIGIR 2014)
- Medusa: Managing Concurrency and Communication in Embedded Systems (USENIX ATC 2014)
- An Environment for Learning Interactive Programming (SIGCSE 2014)
- Hyper-switch: A Scalable Software Virtal Switching Architecture (USENIX ATC 2013)
- Adaptive Parallelism for Web Search (EUROSYS 2013)
- Design and Implementation of an Embedded Python Run-Time System (USENIX ATC 2012)
- SpecTLB: A Mechanism for Speculative Address Translation (ISCA 2011)
- Translation Caching: Skip, Don't Walk (the Page Table) (ISCA 2010)
- US Patent #8,761,152. Scott Rixner, Alan L. Cox, Michael Foss, and Jeffrey Shafer. Method and system for scalable ethernet. Issued June 24, 2014.
- US Patent #7,979,666. Scott Rixner, Kartik Mohanram and Mihir R. Choudhury. System and method for context-independent codes for off-chip interconnects. Issued July 12, 2011.
- US Patent #7,818,539. Scott Rixner, John D. Owens, and Ujval Kapasi, and William J. Dally. System and method for performing efficient conditional vector operations for data parallel architectures involving both input and conditional vector values. Issued October 19, 2010.
- US Patent #7,707,384. William J. Dally and Scott Rixner. System and method for re-ordering memory references for access to memory. Issued April 27, 2010.
- US Patent #6,192,384. William J. Dally, Scott Rixner, J.P. Grossman, and Chris Buehler. System and method for performing compound vector operations. Issued February 20, 2001.
- US Patent #6,016,531. Scott Rixner and C. Ross Ogilvie. Apparatus for performing real time caching utilizing an execution quantization timer and an interrupt controller. Issued January 18, 2000.
- Ph.D. in Electrical Engineering, MIT, 2001.
- M.Eng. in Electrical Engineering and Computer Science, MIT, 1995.
- B.S. in Computer Science and Engineering, MIT, 1995.
- Scott Rixner. A Bandwidth-efficient Architecture for a Streaming Media Processor, MIT Doctor of Philosophy Thesis, 2001.
- Scott Rixner. Memory System Architecture for Real-Time Multitasking Systems, MIT Master of Engineering Thesis, 1995.