Rice University

Associate Professor
Computer Science
Electrical and Computer Engineering

Rice Computer Architecture
Rice University

Contact

E-Mail: rixner@rice.edu
Office: Duncan Hall 3032
Address: Rice University
Dept. of Computer Science, MS 132
6100 Main St.
Houston, TX 77005
Phone: 713-348-6353
Office Hours: Spring 2012: Thursday 2pm, DCH 3032
Advising meetings by appointment

Teaching

Curriculum

  • Chair, Computer Science Undergraduate Committee
  • Chair, School of Engineering Curriculum Committee
  • Member, School of Engineering Design Committee
  • Member, University Committee on Undergraduate Curriculum

Research

Scott Rixner is an Associate Professor in the Computer Science & Electrical and Computer Engineering departments at Rice University. He leads the Rice Computer Architecture Group, and his research interests include media, network, and communications processing; the interaction between operating systems and computer architectures; and memory system architecture. During his doctoral studies, Rixner was the principal architect of the Imagine Stream Processor. His current research focuses on network server architecture, network virtualization, and memory system architecture.

Some of his recent publications include:

  • SpecTLB: A Mechanism for Speculative Address Translation (ISCA 2011)
  • Translation Caching: Skip, Don't Walk (the Page Table) (ISCA 2010)
  • The Hadoop Distributed Filesystem: Balancing Portability and Performance (ISPASS 2010)
  • Achieving 10Gbps Using Safe and Transparent Network Interface Virtualization (VEE 2009)
  • Protection Strategies for Direct Access to Virtualized I/O Devices (USENIX 2008)
  • Scheduling I/O in Virtual Machine Monitors (VEE 2008)
  • Network Virtualization: Breaking the Performance Barrier (ACM Queue Jan/Feb 2008)
  • Concurrent Direct Network Access for Virtual Machine Monitors (HPCA 2007)

You can find further information on his research and publications on the Rice Computer Architecture Group page.

Patents

Scott Rixner has several pending and issued patents, including:
  • US Patent #7,979,666. Scott Rixner, Kartik Mohanram and Mihir R. Choudhury. System and method for context-independent codes for off-chip interconnects. Issued July 12, 2011.
  • US Patent #7,818,539. Scott Rixner, John D. Owens, and Ujval Kapasi, and William J. Dally. System and method for performing efficient conditional vector operations for data parallel architectures involving both input and conditional vector values. Issued October 19, 2010.
  • US Patent #7,707,384. William J. Dally and Scott Rixner. System and method for re-ordering memory references for access to memory. Issued April 27, 2010.
  • US Patent #6,192,384. William J. Dally, Scott Rixner, J.P. Grossman, and Chris Buehler. System and method for performing compound vector operations. Issued February 20, 2001.
  • US Patent #6,016,531. Scott Rixner and C. Ross Ogilvie. Apparatus for performing real time caching utilizing an execution quantization timer and an interrupt controller. Issued January 18, 2000.

Education

  • Ph.D. in Electrical Engineering, MIT, 2001.
  • M.Eng. in Electrical Engineering and Computer Science, MIT, 1995.
  • B.S. in Computer Science and Engineering, MIT, 1995.